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<title>Process–architecture–optimization model</title>

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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Process–architecture–optimization model</span></span>

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<p><b>Process–architecture–optimization</b> is a development model for <a href="Central_processing_unit" title="Central processing unit">central processing units</a> (CPUs) that <a href="Intel" title="Intel">Intel</a> adopted in 2016. Under this three-phase (three-year) model, every <a href="Microprocessor" title="Microprocessor">microprocessor</a> <a href="Die_shrink" title="Die shrink">die shrink</a> is followed by a <a href="Microarchitecture" title="Microarchitecture">microarchitecture</a> change and then by one or more optimizations. It replaced the two-phase (two-year) <a href="Tick%E2%80%93tock_model" title="Tick–tock model">tick–tock model</a> that Intel adopted in 2006. The tick–tock model was no longer economically sustainable, according to Intel, because production of ever smaller dies becomes ever more costly.<sup id="cite_ref-AnandTech_10nm_delay_1-0" class="reference"><a href="#cite_note-AnandTech_10nm_delay-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-ETEKNIX_PAO_3-0" class="reference"><a href="#cite_note-ETEKNIX_PAO-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="Roadmap">Roadmap</h2></div>

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<th>Process<br>(die shrink)</th>

<th>Architecture</th>

<th colspan="5">Optimizations

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<th>Optional<br>backport<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup>

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<td>2014:<br><a href="Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a><br>(5th gen)

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<td>2015:<br><a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a><br>(6th gen)

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<td>2016:<br><a href="Kaby_Lake" title="Kaby Lake">Kaby Lake</a><br>(7th gen)

</td>

<td>2017:<br><a href="Coffee_Lake" title="Coffee Lake">Coffee Lake</a><br>(8th gen)

</td>

<td>2018:<br><a href="Coffee_Lake_Refresh" class="mw-redirect" title="Coffee Lake Refresh">Coffee Lake Refresh</a><br>(9th gen)

</td>

<td>2019:<br><a href="Comet_Lake" title="Comet Lake">Comet Lake</a><br>(10th gen)

</td>

<td>N/A

</td>

<td>2021:<br><a href="Rocket_Lake" title="Rocket Lake">Rocket Lake</a><br>(11th gen, <a href="Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a>)

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<td colspan="8">References:<sup id="cite_ref-AnandTech_10nm_delay_1-1" class="reference"><a href="#cite_note-AnandTech_10nm_delay-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-ETEKNIX_PAO_3-1" class="reference"><a href="#cite_note-ETEKNIX_PAO-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-AnandTech_Kaby_Lake_release_6-1" class="reference"><a href="#cite_note-AnandTech_Kaby_Lake_release-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Intel_ticks_9-0" class="reference"><a href="#cite_note-Intel_ticks-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>

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<th rowspan="2">2:<br><a href="10_nm_process" title="10 nm process">10 nm</a><br>(<a href="7_nm_process" title="7 nm process">Intel 7</a>)

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<td>2018:<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>note 1<span class="cite-bracket">]</span></a></sup><br><a href="Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a><br>(8th gen, <a href="Palm_Cove_(microarchitecture)" class="mw-redirect" title="Palm Cove (microarchitecture)">Palm Cove</a>)

</td>

<td>2019:<br><a href="Ice_Lake_(microprocessor)" title="Ice Lake (microprocessor)">Ice Lake</a><br>(10th gen, <a href="Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a>)

</td>

<td>2020:<br><a href="Tiger_Lake" title="Tiger Lake">Tiger Lake</a><br>(11th gen, <a href="Willow_Cove" title="Willow Cove">Willow Cove</a>)

</td>

<td>2021:<br><a href="Alder_Lake" title="Alder Lake">Alder Lake</a><br>(12th gen, <a href="Golden_Cove" title="Golden Cove">Golden Cove</a>)

</td>

<td>2022:<br><a href="Raptor_Lake" title="Raptor Lake">Raptor Lake</a><br>(13th gen)

</td>

<td>2023:<br><a href="Raptor_Lake_Refresh" class="mw-redirect" title="Raptor Lake Refresh">Raptor Lake Refresh</a> <br>(14th gen)

</td>

<td>2025:<br><a href="Raptor_Lake_Refresh" class="mw-redirect" title="Raptor Lake Refresh">Raptor Lake Refresh</a> <br>(Core 200)

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<td>N/A

</td></tr>

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<td colspan="8">References:<sup id="cite_ref-AnandTech_10nm_delay_1-2" class="reference"><a href="#cite_note-AnandTech_10nm_delay-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Intel_ticks_9-1" class="reference"><a href="#cite_note-Intel_ticks-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-New_node_name_13-0" class="reference"><a href="#cite_note-New_node_name-13"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup>

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<th rowspan="2">3:<br><a href="5_nm_process" title="5 nm process">Intel 4</a><br>&<br> <a href="3_nm_process" title="3 nm process">Intel 3</a>

</th>

<td>2023:<br><a href="Meteor_Lake" title="Meteor Lake">Meteor Lake</a><br>(14th gen)

</td>

<td>2025:<br><a href="Arrow_Lake_(microprocessor)" title="Arrow Lake (microprocessor)">Arrow Lake-U</a><br>(Ultra 200U)

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</td>

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</td>

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<td colspan="8">References:<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup>

</td></tr>

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<th rowspan="2">3:<br><a href="2_nm_process" title="2 nm process">Intel 20A?</a><br>&<br> <a href="2_nm_process" title="2 nm process">Intel 18A</a>

</th>

<td>2025:<br><a href="Panther_Lake_(microprocessor)" title="Panther Lake (microprocessor)"> Panther Lake</a><br> (Ultra 300)

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<td>2026?:<br> Nova Lake<br> (Ultra 400?)

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</td>

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<td colspan="8">References:

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<ul><li><a href="List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">List of Intel CPU microarchitectures</a></li>

<li><a href="Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li>

<li>Template:Intel processor roadmap</li>

<li><a href="Speculative_execution_CPU_vulnerabilities" class="mw-redirect" title="Speculative execution CPU vulnerabilities">Speculative execution CPU vulnerabilities</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2></div>

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<li id="cite_note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-10">^</a></b></span> <span class="reference-text">Cannon Lake: only 1 CPU released, microarchitecture dumped 1.5 year later.</span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

<li id="cite_note-AnandTech_10nm_delay-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-AnandTech_10nm_delay_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-AnandTech_10nm_delay_1-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-AnandTech_10nm_delay_1-2"><sup><i><b>c</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20150717100931/http://www.anandtech.com/show/9447/intel-10nm-and-kaby-lake">Tick Tock On The Rocks: Intel Delays 10nm, Adds 3rd Gen 14nm Core Product "Kaby Lake"</a>. AnandTech. 16 July 2015.</span>

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</style><cite id="CITEREFCutress" class="citation web cs1">Cutress, Ian. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20160323075035/http://anandtech.com/show/10183/intels-tick-tock-seemingly-dead-becomes-process-architecture-optimization">"Intel's 'Tick-Tock' Seemingly Dead, Becomes 'Process-Architecture-Optimization'"</a>. Archived from <a rel="nofollow" class="external text" href="https://www.anandtech.com/show/10183/intels-tick-tock-seemingly-dead-becomes-process-architecture-optimization">the original</a> on March 23, 2016.</cite></span>

</li>

<li id="cite_note-ETEKNIX_PAO-3"><span class="mw-cite-backlink">^ <a href="#cite_ref-ETEKNIX_PAO_3-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-ETEKNIX_PAO_3-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><cite id="CITEREFeTeknix.com2016" class="citation web cs1">eTeknix.com (23 March 2016). <a rel="nofollow" class="external text" href="https://www.eteknix.com/intel-ditches-tick-tock-for-process-architecture-optimization/">"Intel Ditches 'Tick-Tock' for 'Process-Architecture-Optimization' - eTeknix"</a>.</cite></span>

</li>

<li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.legitreviews.com/intel-tick-tock-processor-model-replaced-process-architecture-optimization_180140">"Intel Tick-Tock Processor Model Replaced With Process-Architecture-Optimization - Legit Reviews"</a>. 23 March 2016.</cite></span>

</li>

<li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.tomshardware.com/reviews/intel-7th-gen-core-kaby-lake-preview,4728-6.html">"Intel 7th Gen Core: Process Architecture Optimization"</a>. 30 August 2016.</cite></span>

</li>

<li id="cite_note-AnandTech_Kaby_Lake_release-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-AnandTech_Kaby_Lake_release_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-AnandTech_Kaby_Lake_release_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20170104150420/http://www.anandtech.com/show/10959/intel-launches-7th-generation-kaby-lake-i7-7700k-i5-7600k-i3-7350k">Intel Launches 7th Generation Kaby Lake: 15W/28W with Iris, 35-91W Desktop and Mobile Xeon</a> - 03 January 2017.</span>

</li>

<li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><cite id="CITEREFCutress" class="citation web cs1">Cutress, Dr Ian. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20191211004944/https://www.anandtech.com/show/15217/intels-manufacturing-roadmap-from-2019-to-2029">"Intel's Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm"</a>. <i>www.anandtech.com</i>. Archived from <a rel="nofollow" class="external text" href="https://www.anandtech.com/show/15217/intels-manufacturing-roadmap-from-2019-to-2029">the original</a> on December 11, 2019<span class="reference-accessdate">. Retrieved <span class="nowrap">2021-03-15</span></span>.</cite></span>

</li>

<li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><cite id="CITEREFDecember_20192019" class="citation web cs1">December 2019, Arne Verheyde 11 (11 December 2019). <a rel="nofollow" class="external text" href="https://www.tomshardware.com/news/intel-process-roadmap-shows-14nm-in-2029-two-year-cadence">"Intel Process Roadmap Shows 1.4nm in 2029, Two-Year Cadence (Updated)"</a>. <i>Tom's Hardware</i><span class="reference-accessdate">. Retrieved <span class="nowrap">2021-03-15</span></span>.</cite><span class="cs1-maint citation-comment"><code class="cs1-code">{{cite web}}</code>: CS1 maint: numeric names: authors list (link)</span></span>

</li>

<li id="cite_note-Intel_ticks-9"><span class="mw-cite-backlink">^ <a href="#cite_ref-Intel_ticks_9-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-Intel_ticks_9-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20190130194825/https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-and-core-i3-8121u-deep-dive-review/2">Intel’s Path to 10nm: 2010 to 2019</a> - 25 January 2019</span>

</li>

<li id="cite_note-11"><span class="mw-cite-backlink"><b><a href="#cite_ref-11">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20190125154626/https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-and-core-i3-8121u-deep-dive-review">Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review</a> - 25 January 2019.</span>

</li>

<li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.pcgamer.com/intel-raptor-lake-24-core-rumour/">Intel Raptor Lake's rumoured 24 cores could crush multi-threaded applications</a> - 11 June 2021.</span>

</li>

<li id="cite_note-New_node_name-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-New_node_name_13-0">^</a></b></span> <span class="reference-text"><cite id="CITEREFCutress2021" class="citation web cs1">Cutress, Ian (26 July 2021). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20210726210347/https://www.anandtech.com/show/16823/intel-accelerated-offensive-process-roadmap-updates-to-10nm-7nm-4nm-3nm-20a-18a-packaging-foundry-emib-foveros">"Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A"</a>. <i>www.anandtech.com</i>. Archived from <a rel="nofollow" class="external text" href="https://www.anandtech.com/show/16823/intel-accelerated-offensive-process-roadmap-updates-to-10nm-7nm-4nm-3nm-20a-18a-packaging-foundry-emib-foveros">the original</a> on July 26, 2021.</cite></span>

</li>

<li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><a rel="nofollow" class="external text" href="https://www.pcgamer.com/intel-meteor-lake-tape-/">Meteor Lake, Intel's first 7nm CPU, to tape in before July this year and release in 2023</a> - 23 March 2021.</span>

</li>

</ol></div></div>

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</style></div><div role="navigation" class="navbox" aria-labelledby="Intel65" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel65" style="font-size:114%;margin:0 4em"><a href="Intel" title="Intel">Intel</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Subsidiaries</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><i><a href="3Dlabs" title="3Dlabs">3Dlabs</a></i></li>

<li><a href="Altera" title="Altera">Altera</a></li>

<li><i><a href="Intel_Security" class="mw-redirect" title="Intel Security">Intel Security</a></i></li>

<li><a href="Mobileye" title="Mobileye">Mobileye</a></li>

<li><a href="Recon_Instruments" title="Recon Instruments">Recon Instruments</a></li>

<li><a href="Virtutech" title="Virtutech">Virtutech</a></li>

<li><a href="Wind_River_Systems" title="Wind River Systems">Wind River Systems</a></li>

<li><a href="Xircom" title="Xircom">Xircom</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Joint venture</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">4Group Holdings (50% owned by <a href="Vantiva" title="Vantiva">Vantiva</a>)</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="3D_XPoint" title="3D XPoint">3D XPoint</a></li>

<li><a href="Accounts_%26_SSO" title="Accounts & SSO">Accounts & SSO</a></li>

<li><a href="Amplify_Tablet" title="Amplify Tablet">Amplify Tablet</a></li>

<li><a href="Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a></li>

<li><a href="Cache_Acceleration_Software" title="Cache Acceleration Software">Cache Acceleration Software</a></li>

<li><a href="Client_Initiated_Remote_Access" title="Client Initiated Remote Access">Client Initiated Remote Access</a></li>

<li><a href="Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface</a></li>

<li><a href="Flexible_Display_Interface" title="Flexible Display Interface">Flexible Display Interface</a></li>

<li><a href="Hella_Zippy" title="Hella Zippy">Hella Zippy</a></li>

<li><a href="Intel_1103" title="Intel 1103">Intel 1103</a></li>

<li><a href="Intel_AZ210" title="Intel AZ210">Intel AZ210</a></li>

<li><a href="Intel_Clear_Video" title="Intel Clear Video">Intel Clear Video</a></li>

<li><a href="Intel_Display_Power_Saving_Technology" title="Intel Display Power Saving Technology">Intel Display Power Saving Technology</a></li>

<li><a href="Intel_Modular_Server_System" title="Intel Modular Server System">Intel Modular Server System</a></li>

<li><a href="Intel_Quick_Sync_Video" title="Intel Quick Sync Video">Intel Quick Sync Video</a></li>

<li><a href="Intel_Reader" title="Intel Reader">Intel Reader</a></li>

<li><a href="Intel_system_development_kit" title="Intel system development kit">Intel system development kit</a></li>

<li><a href="Intel_Upgrade_Service" title="Intel Upgrade Service">Intel Upgrade Service</a></li>

<li><a href="Intel740" title="Intel740">Intel740</a></li>

<li><a href="InTru3D" title="InTru3D">InTru3D</a></li>

<li><a href="OFono" title="OFono">OFono</a></li>

<li><a href="Performance_acceleration_technology" title="Performance acceleration technology">Performance acceleration technology</a></li>

<li><a href="Intel_Shooting_Star" title="Intel Shooting Star">Shooting Star</a></li>

<li><a href="Stable_Image_Platform_Program" title="Stable Image Platform Program">Stable Image Platform Program</a></li>

<li><a href="Virtual_8086_mode" title="Virtual 8086 mode">Virtual 8086 mode</a></li>

</div><table class="nowraplinks mw-collapsible autocollapse navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel_processors144" style="font-size:114%;margin:0 4em"><a href="List_of_Intel_processors" title="List of Intel processors">Intel processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="List_of_Intel_processors" title="List of Intel processors">Processors</a>

<li><a href="List_of_Intel_Celeron_processors" title="List of Intel Celeron processors">Celeron</a></li>

<li><a href="List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">Pentium</a>

<li><a href="Intel_Quark#List_of_Intel_Quark_processors" title="Intel Quark">Quark</a></li>

<li><a href="List_of_Intel_Itanium_processors" title="List of Intel Itanium processors">Itanium</a></li></ul></li>

<li><a href="List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></li>

<li><a href="List_of_Intel_chipsets" title="List of Intel chipsets">Chipsets</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="IA-32" title="IA-32">IA-32</a> (<a href="32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Pentium_M" title="Pentium M">P6 variant (Pentium M)</a></li>

<li><a href="Yonah_(microprocessor)" title="Yonah (microprocessor)">P6 variant (Enhanced Pentium M)</a></li></ul></li>

<li><a href="NetBurst" title="NetBurst">NetBurst</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X86-64" title="X86-64">x86-64</a> (<a href="64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></li></ul></li>

<li><a href="Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a>

<ul><li><a href="Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></li></ul></li>

<li><a href="Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a>

<ul><li><a href="Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></li></ul></li>

<li><a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a>

<ul><li><a href="Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></li></ul></li>

<li><a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a>

<ul><li><a href="Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a></li></ul></li>

<li><a href="Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a>

<ul><li><a href="Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a></li></ul></li>

<li><a href="Willow_Cove" title="Willow Cove">Willow Cove</a></li>

<li><a href="Golden_Cove" title="Golden Cove">Golden Cove</a>

<ul><li><a href="Raptor_Cove" class="mw-redirect" title="Raptor Cove">Raptor Cove</a></li></ul></li>

<li>Redwood Cove</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X86" title="X86">x86</a> <a href="Ultra-low-voltage_processor" title="Ultra-low-voltage processor">ULV</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a>

<ul><li><a href="Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></li>

<li><a href="Silvermont" title="Silvermont">Silvermont</a></li></ul></li>

<li><a href="Goldmont" title="Goldmont">Goldmont</a>

<ul><li><a href="Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></li></ul></li>

<li><a href="Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a>

<ul><li><a href="Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></li></ul></li>

<li>Crestmont</li></ul>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="X86-64" title="X86-64">x86-64</a> (<a href="64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em">

<li><a href="Celeron" title="Celeron">Celeron</a></li>

<li><a href="Pentium" title="Pentium">Pentium</a></li>

<li><a href="Intel_Core#Core_and_Core_Ultra_3/5/7/9" title="Intel Core">Core Ultra</a>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Binary-coded_decimal" title="Binary-coded decimal">BCD</a> oriented (<a href="4-bit_computing" title="4-bit computing">4-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">pre-x86 (<a href="8-bit_computing" title="8-bit computing">8-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Early <a href="X86" title="X86">x86</a> (<a href="16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X87" title="X87">x87</a> (external <a href="Floating-point_unit" title="Floating-point unit">FPUs</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<dl><dt>8/16-bit databus</dt>

<dt>16-bit databus</dt>

<dt>32-bit databus</dt>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="IA-32" title="IA-32">IA-32</a> (<a href="32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="RapidCAD" title="RapidCAD">RapidCAD</a></li>

<li><a href="I486_OverDrive" title="I486 OverDrive">OverDrive</a></li></ul></li>

<li><a href="Celeron" title="Celeron">Celeron</a> (1998)

<li><a href="Pentium" title="Pentium">Pentium</a>

<ul><li><a href="Pentium_(original)" title="Pentium (original)">Original i586</a></li>

<li><a href="Pentium_OverDrive" title="Pentium OverDrive">OverDrive</a></li>

<ul><li><a href="List_of_Intel_P6-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel P6-based Xeon microprocessors">P6-based</a></li>

<li><a href="List_of_Intel_NetBurst-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">NetBurst-based</a></li>

<li><a href="List_of_Intel_Core-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel Core-based Xeon microprocessors">Core-based</a></li></ul></li>

<li><a href="Intel_Quark" title="Intel Quark">Quark</a></li>

<li><a href="Tolapai" title="Tolapai">Tolapai</a></li></ul>

<li><a href="Celeron" title="Celeron">Celeron</a>

<li><a href="Pentium" title="Pentium">Pentium</a>

<li><a href="Pentium_D#Smithfield_XE" title="Pentium D">Extreme Edition</a></li>

<ul><li><a href="List_of_Intel_Xeon_processors_(Nehalem-based)" title="List of Intel Xeon processors (Nehalem-based)">Nehalem-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Sandy_Bridge-based)" title="List of Intel Xeon processors (Sandy Bridge-based)">Sandy Bridge-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Ivy_Bridge-based)" title="List of Intel Xeon processors (Ivy Bridge-based)">Ivy Bridge-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Haswell-based)" title="List of Intel Xeon processors (Haswell-based)">Haswell-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Broadwell-based)" title="List of Intel Xeon processors (Broadwell-based)">Broadwell-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Skylake-based)" title="List of Intel Xeon processors (Skylake-based)">Skylake-based</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<dd><a href="Itanium" title="Itanium">Itanium</a></dd>

<dd><a href="StrongARM" title="StrongARM">StrongARM</a></dd>

<dd><a href="XScale" title="XScale">XScale</a></dd></dl>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li>

<li><a href="List_of_Intel_graphics_processing_units" title="List of Intel graphics processing units">Intel GPUs</a>

<li><a href="Intel_Graphics_Technology" title="Intel Graphics Technology">Intel HD, UHD, and Iris Graphics</a></li>

<li><a href="PCI_IDE_ISA_Xcelerator" class="mw-redirect" title="PCI IDE ISA Xcelerator">PIIXs</a></li>

<li><a href="Stratix" title="Stratix">Stratix</a></li>

<li><a href="List_of_Intel_codenames" title="List of Intel codenames">Codenames</a></li>

<li><a href="Larrabee_(microarchitecture)" title="Larrabee (microarchitecture)">Larrabee</a></li></ul>

</div></td></tr></tbody></table><div>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Litigation</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Advanced_Micro_Devices%2C_Inc._v._Intel_Corp." title="Advanced Micro Devices, Inc. v. Intel Corp.">Advanced Micro Devices, Inc. v. Intel Corp.</a></li>

<li><a href="High-Tech_Employee_Antitrust_Litigation" title="High-Tech Employee Antitrust Litigation">High-Tech Employee Antitrust Litigation</a></li>

<li><a href="Intel_Corp._v._Advanced_Micro_Devices%2C_Inc." title="Intel Corp. v. Advanced Micro Devices, Inc.">Intel Corp. v. Advanced Micro Devices, Inc.</a></li>

<li><a href="Intel_Corp._v._Hamidi" title="Intel Corp. v. Hamidi">Intel Corp. v. Hamidi</a></li>

<li><a href="Intel_Corporation_Inc._v_CPM_United_Kingdom_Ltd" class="mw-redirect" title="Intel Corporation Inc. v CPM United Kingdom Ltd">Intel Corporation Inc. v CPM United Kingdom Ltd</a></li>

<li><a href="Silvaco_Data_Systems_v._Intel_Corp." title="Silvaco Data Systems v. Intel Corp.">Silvaco Data Systems v. Intel Corp.</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">People</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Founders</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Gordon_Moore" title="Gordon Moore">Gordon Moore</a></li>

<li><a href="Robert_Noyce" title="Robert Noyce">Robert Noyce</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">CEOs</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li>Robert Noyce</li>

<li>Gordon Moore</li>

<li><a href="Andrew_Grove" title="Andrew Grove">Andrew Grove</a></li>

<li><a href="Craig_Barrett_(chief_executive)" title="Craig Barrett (chief executive)">Craig Barrett</a></li>

<li><a href="Paul_Otellini" title="Paul Otellini">Paul Otellini</a></li>

<li><a href="Brian_Krzanich" title="Brian Krzanich">Brian Krzanich</a></li>

<li><a href="Pat_Gelsinger" title="Pat Gelsinger">Pat Gelsinger</a></li>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Intel_Foundation_Achievement_Award" title="Intel Foundation Achievement Award">Intel Foundation Achievement Award</a></li>

<li><a href="Mac_transition_to_Intel_processors" title="Mac transition to Intel processors">Mac transition to Intel processors</a></li>

<li><a href="Intel_Architecture_Labs" title="Intel Architecture Labs">Intel Architecture Labs</a></li>

<li><a href="Classmate_PC" title="Classmate PC">Classmate PC</a></li>

<li><a href="Convera_Corporation" title="Convera Corporation">Convera Corporation</a></li>

<li><a href="Copy_Exactly!" title="Copy Exactly!">Copy Exactly!</a></li>

<li><a href="Intel_Developer_Forum" title="Intel Developer Forum">Intel Developer Forum</a></li>

<li><a href="Dynamic_video_memory_technology" title="Dynamic video memory technology">Dynamic video memory technology</a></li>

<li><a href="Intel_Extreme_Masters" title="Intel Extreme Masters">Intel Extreme Masters</a></li>

<li><a href="List_of_Intel_microprocessors" class="mw-redirect" title="List of Intel microprocessors">List of Intel microprocessors</a></li>

<li><a href="List_of_Intel_graphics_processing_units_(2013_or_earlier)" class="mw-redirect" title="List of Intel graphics processing units (2013 or earlier)">List of Intel graphics processing units (2013 or earlier)</a></li>

<li><a href="I/O_Acceleration_Technology" title="I/O Acceleration Technology">I/O Acceleration Technology</a></li>

<li><a href="IA-32_Execution_Layer" title="IA-32 Execution Layer">IA-32 Execution Layer</a></li>

<li><a href="IM_Flash_Technologies" title="IM Flash Technologies">IM Flash Technologies</a></li>

<li><i><a href="The_Innovators_(book)" title="The Innovators (book)">The Innovators</a></i></li>

<li><a href="Inside_Films" title="Inside Films">Inside Films</a>

<ul><li><i><a href="Inside_(2011_film)" title="Inside (2011 film)">Inside</a></i></li>

<li><i><a href="The_Beauty_Inside_(web_series)" title="The Beauty Inside (web series)">The Beauty Inside</a></i></li>

<li><i><a href="The_Power_Inside" title="The Power Inside">The Power Inside</a></i></li></ul></li>

<li><a href="Intel_ADX" title="Intel ADX">Intel ADX</a></li>

<li><a href="Intel_Capital" title="Intel Capital">Intel Capital</a></li>

<li><a href="Intel_Cluster_Ready" title="Intel Cluster Ready">Intel Cluster Ready</a></li>

<li><a href="Intel_Compute_Stick" title="Intel Compute Stick">Intel Compute Stick</a></li>

<li><a href="Intel_Ireland" title="Intel Ireland">Intel Ireland</a></li>

<li><a href="Intel_Mobile_Communications" title="Intel Mobile Communications">Intel Mobile Communications</a></li>

<li><a href="Intel_Outstanding_Researcher_Award" title="Intel Outstanding Researcher Award">Intel Outstanding Researcher Award</a></li>

<li><a href="Intel_SHA_extensions" class="mw-redirect" title="Intel SHA extensions">Intel SHA extensions</a></li>

<li><a href="Intel_Teach" title="Intel Teach">Intel Teach</a></li>

<li><a href="List_of_semiconductor_fabrication_plants" title="List of semiconductor fabrication plants">List of semiconductor fabrication plants</a></li>

<li><a href="List_of_Intel_manufacturing_sites" title="List of Intel manufacturing sites">List of Intel manufacturing sites</a></li>

<li><a href="List_of_mergers_and_acquisitions_by_Intel" title="List of mergers and acquisitions by Intel">List of mergers and acquisitions by Intel</a></li>

<li><a href="Intel_Museum" title="Intel Museum">Intel Museum</a></li>

<li><a href="OnCue" class="mw-redirect" title="OnCue">OnCue</a></li>

<li><a href="Intel_PRO/Wireless" title="Intel PRO/Wireless">Intel PRO/Wireless</a></li>

<li><a href="Intel_International_Science_and_Engineering_Fair" class="mw-redirect" title="Intel International Science and Engineering Fair">Intel International Science and Engineering Fair</a></li>

<li><a href="Regeneron_Science_Talent_Search" title="Regeneron Science Talent Search">Regeneron Science Talent Search</a></li>

<li><a href="Simple_Firmware_Interface" title="Simple Firmware Interface">Simple Firmware Interface</a></li>

<li><a href="Single-chip_Cloud_Computer" title="Single-chip Cloud Computer">Single-chip Cloud Computer</a></li>

<li><a href="Software_Guard_Extensions" title="Software Guard Extensions">Software Guard Extensions</a></li>

<li><a href="Supervisor_Mode_Access_Prevention" title="Supervisor Mode Access Prevention">Supervisor Mode Access Prevention</a></li>

<li><a href="Tarari_(company)" class="mw-redirect" title="Tarari (company)">Tarari</a></li>

<li><a href="Intel_Tera-Scale" title="Intel Tera-Scale">Intel Tera-Scale</a></li>

<li><a href="Timeline_of_Intel" title="Timeline of Intel">Timeline of Intel</a></li></ul>

</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Intel_CPU_core_roadmaps_from_P6_to_Panther_Lake74" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel_CPU_core_roadmaps_from_P6_to_Panther_Lake74" style="font-size:114%;margin:0 4em">Intel CPU core roadmaps from <a href="P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> to Panther Lake</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"><table class="wikitable" style="border:none; text-align:center;">

<th colspan="2" style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);"><a href="Pentium" title="Pentium"><span style="color:var(--color-progressive);">Pentium</span></a>/<a href="Intel_Core" title="Intel Core"><span style="color:var(--color-progressive);">Core</span></a></th>

</tr>

<tr>

<th style="background-color:var(--background-color-progressive-subtle);"><a href="Microarchitecture" title="Microarchitecture"><span style="color:var(--color-progressive);">Microarch.</span></a></th>

<th style="background-color:var(--background-color-progressive-subtle);"><a href="Microarchitecture" title="Microarchitecture"><span style="color:var(--color-progressive);">Microarch.</span></a></th>

</tr>

<tr>

<td><a href="Pentium_Pro" title="Pentium Pro">Pentium Pro</a><br>(133 MHz)</td>

</tr>

<tr>

<td><a href="Pentium_Pro" title="Pentium Pro">Pentium Pro</a><br>(150 MHz)</td>

</tr>

<tr>

<td><a href="Pentium_Pro" title="Pentium Pro">Pentium Pro</a><br>(166–200 MHz)</td>

</tr>

<tr>

<td><a href="Klamath_(microprocessor)" class="mw-redirect" title="Klamath (microprocessor)">Klamath</a></td>

</tr>

<tr>

<td><a href="Deschutes_(microprocessor)" class="mw-redirect" title="Deschutes (microprocessor)">Deschutes</a></td>

</tr>

<tr>

<td><a href="Katmai_(microprocessor)" class="mw-redirect" title="Katmai (microprocessor)">Katmai</a></td>

<th style="background-color:var(--background-color-progressive-subtle);"><a href="NetBurst" title="NetBurst"><span style="color:var(--color-progressive);">NetBurst</span></a></th>

</tr>

<tr>

<td><a href="Coppermine_(microprocessor)" class="mw-redirect" title="Coppermine (microprocessor)">Coppermine</a></td>

<td><a href="Pentium_4#Willamette" title="Pentium 4">Willamette</a></td>

</tr>

<tr>

<td><a href="Tualatin_(microprocessor)" class="mw-redirect" title="Tualatin (microprocessor)">Tualatin</a></td>

<td rowspan="2"><a href="Pentium_4#Northwood" title="Pentium 4">Northwood</a></td>

</tr>

<tr>

<td rowspan="4"><b>Pentium M</b></td>

<td><a href="Banias_(microprocessor)" class="mw-redirect" title="Banias (microprocessor)">Banias</a></td>

<th style="background-color:var(--background-color-progressive-subtle);"><a href="Hyper-threading" title="Hyper-threading"><span style="color:var(--color-progressive);">NetBurst(HT)</span></a></th>

<th style="background-color:var(--background-color-progressive-subtle); color:var(--color-base);">NetBurst(<a href="Multi-core_processor" title="Multi-core processor"><span style="color:var(--color-progressive);">×2</span></a>)</th>

</tr>

<tr>

<td rowspan="2"><a href="Dothan_(microprocessor)" class="mw-redirect" title="Dothan (microprocessor)">Dothan</a></td>

<td><a href="Pentium_4#Prescott" title="Pentium 4">Prescott</a></td>

<td><a href="Pentium_4#Prescott_2M_(Extreme_Edition)" title="Pentium 4">Prescott‑2M</a></td>

<td><a href="Smithfield_(microprocessor)" class="mw-redirect" title="Smithfield (microprocessor)">Smithfield</a></td>

</tr>

<tr>

<td><s><a href="Tejas_and_Jayhawk" title="Tejas and Jayhawk">Tejas</a></s></td>

<td><s><a href="Tejas_and_Jayhawk#Design_and_microarchitecture" title="Tejas and Jayhawk">Cedarmill (Tejas)</a></s></td>

</tr>

<tr>

<td><a href="Yonah_(microprocessor)" title="Yonah (microprocessor)">Yonah</a></td>

<td><s><a href="NetBurst#Successor" title="NetBurst">Nehalem (NetBurst)</a></s></td>

<td><a href="Pentium_4#Cedar_Mill" title="Pentium 4">Cedar Mill</a></td>

<td><a href="Presler_(microprocessor)" class="mw-redirect" title="Presler (microprocessor)">Presler</a></td>

</tr>

<tr>

<td><a href="Intel_Core_(microarchitecture)" title="Intel Core (microarchitecture)">Merom</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">4 cores on mainstream desktop, <a href="DDR3" class="mw-redirect" title="DDR3">DDR3</a> introduced</td>

</tr>

<tr>

<td rowspan="4"><b>Bonnell</b></td>

<td rowspan="2"><a href="Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a></td>

<td><a href="Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></td>

</tr>

<tr>

<td rowspan="2"><b>Nehalem</b></td>

<td><a href="Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);"><a href="Hyper-threading" title="Hyper-threading">HT</a> reintroduced, integrated <a href="Memory_controller" title="Memory controller">MC</a>, PCH<br>L3-cache introduced, 256KB L2-cache/core</td>

</tr>

<tr>

<td rowspan="2"><a href="Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></td>

<td><a href="Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Introduced GPU on same package and <a href="AES-NI" class="mw-redirect" title="AES-NI">AES-NI</a></td>

</tr>

<tr>

<td rowspan="2"><b>Sandy Bridge</b></td>

<td><a href="Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">On-die ring bus, no more non-<a href="UEFI" title="UEFI">UEFI</a> motherboards</td>

</tr>

<tr>

<td rowspan="4"><b>Silvermont</b></td>

<td rowspan="2"><a href="Silvermont" title="Silvermont">Silvermont</a></td>

<td><a href="Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></td>

</tr>

<tr>

<td rowspan="2"><b>Haswell</b></td>

<td><a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Fully integrated voltage regulator</td>

</tr>

<tr>

<td rowspan="2"><a href="Airmont_(microarchitecture)" class="mw-redirect" title="Airmont (microarchitecture)">Airmont</a></td>

<td><a href="Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></td>

</tr>

<tr>

<td rowspan="7"><b>Skylake</b></td>

<td><a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);"><a href="DDR4" class="mw-redirect" title="DDR4">DDR4</a> introduced on mainstream desktop</td>

</tr>

<tr>

<td rowspan="3"><b>Goldmont</b></td>

<td rowspan="3"><a href="Goldmont" title="Goldmont">Goldmont</a></td>

</tr>

<tr>

<td><a href="Coffee_Lake" title="Coffee Lake">Coffee Lake</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">6 cores on mainstream desktop</td>

</tr>

<tr>

<td><a href="Kaby_Lake#Amber_Lake" title="Kaby Lake">Amber Lake</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>

</tr>

<tr>

<td rowspan="4"><b>Goldmont Plus</b></td>

<td rowspan="4"><a href="Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></td>

<td><a href="Whiskey_Lake" title="Whiskey Lake">Whiskey Lake</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>

</tr>

<tr>

<td><a href="Coffee_Lake" title="Coffee Lake">Coffee Lake</a> Refresh</td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">8 cores on mainstream desktop</td>

</tr>

<tr>

<td><a href="Comet_Lake_(microprocessor)" class="mw-redirect" title="Comet Lake (microprocessor)">Comet Lake</a></td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">10 cores on mainstream desktop</td>

</tr>

<tr>

<td><b>Sunny Cove</b></td>

<td><a href="Sunny_Cove_(microarchitecture)#Cypress_Cove" title="Sunny Cove (microarchitecture)">Cypress Cove</a> (<a href="Rocket_Lake" title="Rocket Lake">Rocket Lake</a>)</td>

<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Backported Sunny Cove microarchitecture for 14nm</td>

</tr>

<tr>

<td rowspan="3"><b>Tremont</b></td>

<td rowspan="3"><a href="Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a></td>

<td><b>Skylake</b></td>

<td>Palm Cove (<a href="Cannon_Lake_(microarchitecture)" class="mw-redirect" title="Cannon Lake (microarchitecture)">Cannon Lake</a>)</td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">Mobile-only</td>

</tr>

<tr>

<td rowspan="2"><b>Sunny Cove</b></td>

<td><a href="Sunny_Cove" class="mw-redirect" title="Sunny Cove">Sunny Cove</a> (<a href="Ice_Lake_(microprocessor)" title="Ice Lake (microprocessor)">Ice Lake</a>)</td>

<td colspan="5" style="text-align:left; color:var(--color-base); border:none; background-color:var(--background-color-base);">512 KB L2-cache/core</td>

</tr>

<tr>

<td><a href="Willow_Cove" title="Willow Cove">Willow Cove</a> (<a href="Tiger_Lake" title="Tiger Lake">Tiger Lake</a>)</td>

<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);"><a href="Intel_Xe" title="Intel Xe">X<sup>e</sup></a> graphics engine</td>

</tr>

<tr>

<td rowspan="2"><b>Gracemont</b></td>

<td rowspan="2"><a href="Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></td>

<th rowspan="2"><a href="7_nm_process" title="7 nm process">Intel 7</a><br>(10nm ESF)</th>

<td rowspan="2"><b>Golden Cove</b></td>

<td><a href="Golden_Cove" title="Golden Cove">Golden Cove</a> (<a href="Alder_Lake" title="Alder Lake">Alder Lake</a>)</td>

<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Hybrid, DDR5, PCIe 5.0</td>

</tr>

<tr>

<td><a href="Golden_Cove#Raptor_Cove" title="Golden Cove">Raptor Cove</a> (<a href="Raptor_Lake" title="Raptor Lake">Raptor Lake</a>)</td>

</tr>

<tr>

<td rowspan="2"><b>Crestmont</b></td>

<td rowspan="2">Crestmont</td>

<th><a href="5_nm_process" title="5 nm process">Intel 4</a></th>

<td rowspan="2"><b>Redwood Cove</b></td>

<td><a href="Meteor_Lake" title="Meteor Lake">Meteor Lake</a></td>

<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Mobile-only<br><a href="Neural_processing_unit" title="Neural processing unit">NPU</a>, <a href="Chiplet" title="Chiplet">chiplet</a> architecture</td>

</tr>

<tr>

<th><a href="3_nm_process" title="3 nm process">Intel 3</a></th>

<td><a href="Arrow_Lake_(microprocessor)" title="Arrow Lake (microprocessor)">Arrow Lake-U</a></td>

</tr>

<tr>

<td rowspan="2"><b>Skymont</b></td>

<td rowspan="2"><i>Skymont</i></td>

<td><i><a href="Lunar_Lake" title="Lunar Lake">Lunar Lake</a></i></td>

<td colspan="5" style="border:none; background-color:var(--background-color-base); text-align:left; color:var(--color-base);">Low power mobile only (9-30W) </td>

</tr>

<tr>

<td><i><a href="Arrow_Lake_(microprocessor)" title="Arrow Lake (microprocessor)">Arrow Lake</a></i></td>

</tr>

<tr>

<td><b>Darkmont</b></td>

<td><i>Darkmont</i></td>

<td><a href="2_nm_process" title="2 nm process">Intel 18A</a></td>

<td><b>Cougar Cove</b></td>

<td><i><a href="Panther_Lake_(microprocessor)" title="Panther Lake (microprocessor)">Panther Lake</a></i></td>

</tr>

</tbody></table>

<li><s>Strike-through</s> indicates cancelled processors

</li><li><b>Bold names</b> are microarchitectures

</li><li><i>Italic names</i> are future processors

</li></ul></div></td></tr></tbody></table></div>

<p><br>

</p>

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